Full Reverse Engineering of the TI-84 Plus Operating System
4 hours ago
- #z80-architecture
- #reverse-engineering
- #ti-84-plus
- TI-84 Plus OS reverse-engineering targets a 1 MiB flash dump (OS 2.55MP) on a Z80 CPU with paging.
- The OS uses a 4-slot paging scheme and bcall mechanism to access 128 KiB RAM and 1 MiB flash beyond the 64 KiB address space.
- Core OS pillars include paging/bcalls, a floating-point engine with 9-byte BCD reals, a variable system (VAT), and a TI-BASIC tokenizer/parser.
- I/O subsystems cover interrupts (IM1), LCD, keypad, and link port, documented across multiple pages like 02-paging.md and 04-interrupts.md.
- Additional deep-dive docs explore user-facing features (graphing, TI-BASIC, apps) and peripherals (USB, link), with confidence flags (e.g., confirmed, hypothesis) for analysis.