The adder at the heart of Intel's 8087 floating-point chip

5 hours ago

The Intel 8087 floating-point coprocessor, released in 1980, includes a 69-bit adder that is central to its performance.
The adder uses a Manchester carry chain and a carry-skip circuit, dividing the 69-bit addition into 4-bit blocks to optimize speed.
To handle electrical limitations of NMOS transistors, the adder precharges carry lines high and pulls them low as needed.
Despite optimizations, the adder requires two clock cycles to complete an addition due to its size and design.
The adder supports 69-bit inputs and 70-bit outputs, with extra bits for rounding, doubling, and two's complement negation.
Surrounding circuitry includes registers and shifters for operations like multiplication, division, and square root.
The 8087's adder design balances performance and complexity, using techniques like radix-4 Booth multiplication for efficiency.

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