New 3D silicon chip breakthrough could extend Moore's Law for years
4 hours ago
- #Moore's Law
- #Semiconductors
- #3D Integration
- Researchers developed a monolithic 3D integration method stacking silicon circuits vertically to overcome miniaturization limits, potentially extending Moore's Law.
- The process uses ultrathin silicon nanomembranes transferred at low temperatures (<200°C), maintaining single-crystalline silicon quality and staying within the 400°C thermal budget for existing interconnects.
- This approach enabled three stacked layers with high-yield (98-100%) junctionless transistors, showing performance matching conventional silicon and outperforming alternative materials by 3-4 times.
- Vertical stacking reduces spatial footprint, shortens wiring distances, increases communication bandwidth, and improves energy efficiency, benefiting AI and data-intensive applications.
- The scalable technology, supported by industry partners like IBM and Intel, is being prepared for transfer to commercial foundries, aiming for widespread adoption in chip manufacturing.