PlayStation Architecture
4 hours ago
- #Game Console
- #Hardware
- #3D Graphics
- Sony designed the PlayStation with a simple and practical approach to 3D hardware development, which influenced its initial design constraints.
- The CPU is a Sony CXD8530BQ, a System-on-Chip (SoC) based on the MIPS R3000A architecture, using a 33.87 MHz core with features like a 5-stage pipeline and 4 KB instruction cache, but no data cache (replaced by Scratchpad memory).
- The CPU integrates three coprocessors: System Control Coprocessor (CP0) for cache and interrupt management; Geometry Transformation Engine (CP2) for vector and matrix calculations; and Motion Decoder (MDEC) for video decompression.
- Graphics processing involves a proprietary GPU that handles rendering via commands from the CPU, using an ordering table for polygon sorting, affine texture mapping without filtering, and support for effects like transparency and dithering.
- The console includes 1 MB of VRAM (later SGRAM) for graphics, with adjustable frame buffers to optimize memory usage, and supports video outputs like composite, S-Video, and RGB via the AV Multi Out port.
- Audio is handled by the Sound Processing Unit (SPU), offering 24 channels of ADPCM audio at 44.1 kHz, with features like pitch modulation, reverb, and direct streaming from CD.
- The CD subsystem includes a DSP, Sub-CPU (Motorola 68HC05), and controller for copy protection and data handling, with anti-piracy measures like Wobble Groove and region locking via embedded strings.
- Development tools included an SDK with a C compiler, BIOS-based APIs for hardware abstraction, and specialized hardware like the DTL-H2000 for debugging, plus hobbyist kits like Net Yaroze.
- Common issues included texture warping due to affine mapping without perspective correction, and model flickering from software sorting, with workarounds like tessellation or pre-rendered graphics.