AMD's Instinct MI455X: Aiming for the Sun
6 hours ago
- AMD introduces the Instinct MI455X, its flagship AI accelerator based on the new CDNA5 architecture, designed for rack-scale deployments with CoWoS-L packaging.
- The Helios rackscale solution enables scaling to 72 GPUs per pod using UALink over Ethernet (UAEoL) with fault-tolerant all-to-all communication.
- Single MI455X features 256 WGPs across 8 XCDs, peak clock of 2.4 GHz, achieving up to 40.26 PFLOP (MXFP4) and 315 TFLOP (FP32), with 432 GB HBM4 memory at 23.3 TB/s bandwidth.
- Compute unit changes: each WGP now contains four dual-issue Wave32 SIMD32 units and four scalar units, allowing 256 packed FP32 operations per cycle; VGPR register file increased to 1024 registers per wave.
- Matrix units enhanced to 8,192 FP4 operations per cycle per unit, with four units per WGP; inter-WGP caches doubled (L1 Data Cache to 64 KB, LDS to 320 KB).
- Memory subsystem introduces multicast loads and a Broadcast Arbitrator, enabling up to 4x bandwidth amplification by reducing redundant traffic.
- SoC includes 192 MB global L2 across two Fabric Cache Dies, connected to 12 HBM4 stacks; CPU-GPU link replaced by AMD Infinity Fabric providing 256 GB/s bidirectional bandwidth.
- Helios platform uses OCP Open Rack Wide form factor with 72 GPUs (9 compute trays, each with 4 MI455X and 1 EPYC CPU), 6 switch trays, delivering up to 2.9 EF (MXFP4) and 31 TB shared HBM4 memory.