Intel's E2200 "Mount Morgan" IPU at Hot Chips 2025
15 hours ago
- #Intel
- #Cloud Computing
- #Hardware Acceleration
- Intel's 'Mount Morgan' IPU is designed to offload a wide variety of infrastructure services in cloud environments, improving efficiency and isolation.
- The IPU features 24 Arm Neoverse N2 cores, upgraded from 16 Neoverse N1 cores in its predecessor, Mount Evans, enhancing compute power.
- Mount Morgan includes a quad-channel LPDDR5-6400 memory subsystem, offering higher bandwidth compared to Mount Evans's triple-channel LPDDR4X-4267 setup.
- A Lookaside Crypto and Compression Engine (LCE) supports asymmetric cryptography, a notable upgrade from Mount Evans, enhancing TLS handshake performance.
- The IPU's network subsystem includes a 400 Gbps Ethernet throughput, double that of Mount Evans, with inline accelerators for cloud networking tasks.
- A programmable P4-based packet processing pipeline (FXP) handles packet processing efficiently, supporting multiple passes per packet for tasks like decapsulation and firewall rules.
- An inline crypto block in the network subsystem focuses on symmetric cryptography, supporting IPSec and Google's PSP protocol with doubled throughput.
- The IPU includes a traffic shaper block for quality of service measures, ensuring fair network bandwidth allocation among customers.
- RDMA traffic is supported with hardware offload, accommodating millions of queue pairs and virtual functions, with low-latency transport protocols like Falcon and Swift.
- Mount Morgan's PCIe capabilities include 32 Gen 5 lanes, offering flexibility for multi-host, headless, or converged modes, enhancing IO bandwidth and configurability.
- The IPU's design reflects Intel's ambition to expand beyond CPUs, showcasing engineering capability despite challenges in the CPU market.