Time Between The Lines: how memory access affects performance (2015)
a year ago
- #optimization
- #memory-hierarchy
- #performance
- Memory access patterns significantly impact program performance due to modern hardware's memory hierarchy.
- Classical complexity analysis assumes uniform memory access, which is inaccurate on modern hardware with multi-level caches.
- Hardware optimizations like caching and prefetching exploit spatial locality to speed up sequential memory access.
- Experiments show sequential memory access is much faster than random or indirect access due to cache efficiency.
- Optimizing data layout (e.g., grouping related data) can yield significant performance improvements by reducing cache misses.
- Algorithms with fewer cache misses may outperform theoretically faster algorithms with poor memory access patterns.