Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates
7 hours ago
- #DemoScene
- #ASIC
- #RetroComputing
- The article discusses a demo competition entry for Tiny Tapeout 8, where participants submit ASIC designs limited to about 4000 logic gates.
- The author submitted two entries: a retro-style intro demo and a Nyan Cat animation, both outputting 2-bit RGB to VGA and 1-bit audio.
- The intro demo features a starfield, a 3D checkerboard, and scrolling text with shadows, inspired by classic C64/Amiga intros.
- Constraints include no ROM, no RAM, and limited flip-flops, making traditional data compression and frame buffering impossible.
- Prototyping was done using Verilator for simulation and an FPGA with an R-2R DAC for output, though the custom 1220x480 video mode caused issues.
- The design uses sigma-delta conversion for audio, ordered dithering for color fidelity, and a symplectic integrator for sine wave generation.
- The article details the challenges of encoding data in an ASIC without traditional ROM, using logic gates to represent data patterns.
- Music composition was structured to minimize logic complexity, using repeating patterns and simple synthesizers for square waves and percussion.
- The Nyan Cat entry reused techniques from the intro demo but aimed for better synchronization between audio and video.
- Manufacturing delays and company shutdowns impacted the delivery of the physical chips, but they eventually arrived and worked as intended.