IBM Outlines Sub-1nm Nanostack Transistor Technology
5 hours ago
- #semiconductors
- #transistors
- #IBM Research
- Moore's Law is slowing, with transistor shrinkage now taking about five years instead of two.
- IBM Research announces the Nanostack transistor for sub-1nm geometries, aiming to lead fab tech for a decade.
- Nanostack uses wafer stacking to increase transistor density vertically, enabling smaller circuits.
- Current industry shift from FinFET to GAAFET transistors addresses electron leakage but faces scalability limits.
- GAAFET expected to peak in early-to-mid 2030s, prompting research into successors like Nanostack.