Giving RISC-V 1024 registers for zkVMs
12 hours ago
- #zkVM
- #RISC-V
- #compiler-optimization
- RISC-V is commonly used in zkVMs due to its simplicity, but its 32-register limit causes memory spills that are expensive in zkVM proof generation.
- Powdr developed 'crush', compiling WebAssembly to a custom ISA with infinite registers, significantly reducing proof times compared to RISC-V.
- An experiment with RISC-V-X extended RISC-V to 1024 registers using LLVM and AI assistance, eliminating intra-function spills in benchmarks like SHA3-256.
- The extension reduced executed instructions by 13.5% and trace cells by 13.6%, but proof time only improved by 2.4% due to persistent cross-function call spills.
- Frame-based register partitioning (as in crush) is needed to fully eliminate spills, as RISC-V's shared register file inherently requires saves across calls.