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Trigger Crossbar

6 hours ago
https://serd.es/2025/09/14/Trigger-crossbar.html
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  • #instrumentation
  • #electronics
  • #FPGA
  • The article discusses the challenges of managing multiple instruments with trigger input/output ports in a large electronics lab.
  • A solution is proposed: a 1U device with Ethernet SCPI interface and coaxial trigger inputs/outputs, connected to an FPGA-based switch fabric.
  • The device includes buffered outputs with level shifters for different voltage levels and inputs with comparators for variable thresholds.
  • The design uses a Xilinx XC7K70T-2FBG484C FPGA for high-performance I/O and an STM32H735 MCU as the controller.
  • Several design and assembly challenges are detailed, including power issues, comparator Vcm problems, SPI/QSPI bus issues, and FPGA flash pinout bugs.
  • A custom 1U enclosure was designed, but faced issues with rack ears, panel access, and cable routing.
  • The front panel features an STM32L431 MCU, I2C I/O expander, LEDs, and an e-paper display for system status.
  • The device supports SSH for low-level configuration and firmware updates, and SCPI for remote control and crossbar configuration.
  • The BERT (Bit Error Rate Tester) functionality is highlighted, with features like PRBS pattern generation and CDR-based logic analyzer.
  • The project serves as a learning experience and a useful tool for the lab, with plans for future improvements.
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