EE Journal on the upcoming $99 dollar explorer board
5 hours ago
- #Low-Cost Hardware
- #FPGA Development
- #AMD Artix UltraScale+
- Adiuvo Engineering's Explorer dev board features an AMD Artix UltraScale+ AU7P FPGA and is priced at $99, lower than the FPGA's standalone cost, thanks to AMD's support for a low-cost development platform.
- The Artix UltraScale+ AU7P FPGA offers 75K flip-flops, 37K LUTs, 108 BRAM blocks, 216 DSP slices, and four 12.5Gbps GTH transceivers, suitable for signal processing, embedded acceleration, and communications.
- The board includes four PMOD connectors for sensors and actuators, two SYZYGY/Zmod high-speed serial interfaces for data acquisition and vision, a USB-C port for power/programming, and an on-board Raspberry Pi RP2040 for power management.
- Adiuvo used signal-integrity simulations to enable cost-effective PCB design with offset through-hole vias instead of expensive HDI methods, reducing manufacturing costs for the fine-pitch FPGA package.
- The Explorer board comes with a Vivado Design Suite license and supports RISC-V via the MicroBlaze V soft-core processor, with planned board support packages, sample code, and DSP tutorials from Adiuvo.
- Production plans include 100 Beta boards in October and 3000 units starting February 2027, though FPGA lead times may cause delays, while Adiuvo also offers FPGA training classes and hosts the Horizons FPGA conference.