Weird CPU architectures, the MOV only CPU (2020)
4 days ago
- #Digital Logic
- #Transport Triggered Architecture
- #CPU Architecture
- The author discusses their interest in unusual CPU architectures, particularly the Transport Triggered Architecture (TTA).
- TTA CPUs operate by moving data between memory-mapped components like the ALU and registers, instead of using traditional arithmetic instructions.
- The author built a simple TTA CPU using Digital, a digital logic simulator, with a 16-bit address space and a single MOVE instruction.
- Key components of the TTA CPU include a program counter, ALU, and a flow control block for conditional jumps.
- The CPU executes instructions in four clock cycles: fetching source and destination addresses, reading data, and writing it.
- A Fibonacci sequence calculation was implemented to demonstrate the CPU's functionality, showcasing its ability to handle loops and arithmetic.
- The author notes the CPU's inefficiency and a minor bug related to RAM timing but highlights the fun and educational aspect of the project.