2 days ago
- ECC RAM uses Hamming codes to correct single-bit and detect double-bit errors; DDR4 uses 72-bit data width for 64-bit data with extra bits for error correction.
- Registered DIMMs (RDIMMs) have buffers allowing more/larger DIMMs but may increase latency; ECC UDIMMs are expensive, while ECC RDIMMs are cheaper second-hand.
- ChipKill (Advanced ECC) handles entire DRAM chip failures, used in servers with features like hot-spare RAM; DDR5 introduces on-die ECC for 128-bit data blocks to address higher error rates.
- DDR5 supports EC4 (36 bits/subchannel) and EC8 (40 bits/subchannel) variants; EC8 enables full Hamming checks per subchannel, while EC4 may have limitations.
- ECC is crucial as RAM errors cause crashes (e.g., 15% of Firefox crashes), data corruption, and wasted development time; wider ECC adoption is needed through policy and education.