Hasty Briefsbeta

Bilingual

Microbenchmarking Chipsets for Giggles

5 hours ago
  • #chipsets
  • #hardware
  • #benchmarking
  • Motherboard chipsets have reduced performance-critical functions over time, with CPUs taking over tasks like memory control and PCIe interfacing.
  • Testing chipset latency is not useful but fun, using a modified Vulkan-based GPU benchmark suite to measure GPU memory access latency over PCIe.
  • AMD's AM5 platform with PROM21 chips shows increased latency when accessing PCIe lanes through the chipset, with additional latency when going through two PROM21 chips.
  • Intel's Arrow Lake platform shows higher baseline latency than AMD's Zen 5, with similar added latency when accessing through the PCH.
  • Older platforms like AMD's AM3+ and Intel's Skylake show varying latency impacts when accessing PCIe lanes through the chipset or northbridge.
  • Chipsets today are not optimized for low latency, focusing instead on high-latency IO like SSDs and network adapters, with little expectation for future latency optimizations.
  • Future chipset designs are expected to prioritize cost reduction, better connectivity, and higher bandwidth for newer SSDs over latency improvements.