ARM's Barrel Shifting Tricks
6 days ago
- #Compiler Optimizations
- #Barrel Shifter
- #ARM
- ARM processors have a barrel shifter, allowing many instructions to include a shift of the second operand, which is efficient.
- Multiplication by constants like 2, 3, 4, and 16 can be optimized using shifts and adds on ARM.
- For constants like 25 or 522, ARM requires a multiply instruction since there's no shift shortcut.
- ARM's fixed-size instruction format (4 bytes) limits the space for operands, requiring constants to be loaded before use.
- 32-bit ARM (armv7) has a trick using 'rsb' (reverse subtract) to multiply by one-less-than-a-power-of-two, e.g., (8 * x) - x for multiplying by 7.
- Different architectures have unique optimization tricks: x86 has 'lea', ARM has the barrel shifter.
- Modern ARM cores like Cortex-A76 handle small left shifts efficiently, though larger or right shifts may add latency.