Hasty Briefsbeta

Vibe Code Warning – A personal casestudy

13 days ago
https://github.com/jackdoe/pico2-swd-riscv
Copy Link
  • #SWD
  • #Debugging
  • #RISC-V
  • Implementation of a stateful SWD protocol for debugging RP2350 RISC-V cores using Raspberry Pi Pico2 GPIOs.
  • 80% of the code was 'vibe coded' with the rest generated by Claude AI, leading to mixed feelings about the process.
  • The project involved extensive use of an oscilloscope and documentation to create a working prototype for SBA/read/write operations.
  • The library grew from ~1000 to ~4000 lines of code, making it difficult to maintain a mental model of the system.
  • The author expresses frustration with AI-generated code, noting the lack of reasoning behind tokens and the difficulty in trusting the code.
  • The library provides a three-layer abstraction for SWD protocol communication with RP2350's RISC-V Debug Module.
  • Detailed explanation of RISC-V hart states (RUNNING, HALTED, RESUMING) and the Debug Module's role in controlling harts.
  • Description of the Abstract Command mechanism for accessing hart registers and the Program Buffer (PROGBUF) for executing RISC-V instructions in debug mode.
  • System Bus Access (SBA) allows non-intrusive memory access, bypassing the hart but with potential coherency issues.
  • SWD protocol details, including request, acknowledge, and data phases, and the use of PIO for precise timing.
  • Dormant state and activation sequences for SWD protocol, ensuring reliable connection regardless of initial state.
  • Debug Access Port (DAP) implementation, including DP and AP register access and power-up sequences.
  • RP2350-specific initialization sequences and RISC-V Debug Module register mappings.
  • Hart control via DMCONTROL register, including halt, resume, and reset operations.
  • Single-step execution and software instruction tracing capabilities.
  • Support for dual RISC-V harts with independent control and state tracking.
  • Comprehensive error reporting and state tracking to optimize SWD transactions.
  • Example usage scenarios, including halting harts, reading registers, and executing code.
  • Limitations include lack of hardware breakpoints, multi-target SWD support, and flash programming routines.
  • The author reflects on the mixed experience of using AI for code generation, highlighting both efficiency gains and loss of code ownership and understanding.
AboutLogin