From Pal to Verilog: Writing the A4092 Logic from Scratch
13 hours ago
- #Hardware Design
- #Retro Computing
- #Collaborative Engineering
- The author created the A4092, a reproduction of the Amiga A4091 SCSI-2 controller, using a CPLD (Xilinx XC95144XL) to replace the original PAL chips, despite the chip being end-of-life, arguing it fits the vintage aesthetic.
- Developing the CPLD logic involved collaboration with Olaf Kordwittenborg (Dorken), who quickly implemented core functions like Autoconfig, Flash ROM access, and SCSI chip access within a weekend, after the author's initial struggles with Verilog caused overheating issues due to floating signals.
- Key technical challenges included fitting logic into the CPLD's limited macrocells, debugging an SPI ROM interface with address mapping and chip select bugs, handling A3000 compatibility issues with cache settings, and optimizing DMA arbitration for stable transfer rates, with ongoing work on features like quick interrupts and Buster revision fixes.