Results from the ASIC puzzle
2 days ago
- The puzzle involved reverse-engineering a chip's GDS layout to determine its function, which was a hardware checker for an 11x11 Star Battle puzzle.
- Solvers used various tools (KLayout, Yosys, Z3) and programming languages (Python, Rust, C++) to extract netlists, simulate, and analyze the chip.
- The chip checks for exactly two stars per row, column, and region, and ensures no two stars touch, using counters and delay lines.
- Different solving approaches included walking through logic backwards, dynamic exploration with impulses, SAT solving, and cracking the output generator.
- Easter eggs included hidden messages like 'PER ARENAM AD ASTRA' in Morse code, a Jane Street logo, and failure strings like 'EMPTY SKY' and 'BIG BANG'.
- Some solvers implemented creative solutions, such as synthesizing the chip on an FPGA, recreating it in Minecraft, or building zero-knowledge proofs.
- The post encourages further participation in a protocol-emulator ASIC competition, with submissions due January 18, 2027.