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Nvidia's Olympus Core: Pushing Server Single Threaded Performance Boundaries

12 hours ago
  • Olympus is a 10-wide out-of-order server core designed to maximize single-threaded performance through high per-clock efficiency, running at a modest 3.3 GHz.
  • It diverges from Arm's Cortex X925 by implementing simultaneous multi-threading (SMT) and using larger out-of-order structures.
  • Branch prediction is strong but slightly behind AMD's Zen 5; it can handle two taken branches per cycle within a 48 KB instruction footprint, with a 16K entry BTB.
  • NVIDIA uses ahead indexing for branch prediction, enabling up to 2.3x higher predictions per cycle compared to the competition.
  • Instruction fetch includes a 64 KB instruction cache delivering 128 bytes/cycle into a 48-instruction decode queue; L2 fetch throughput is high but drops sharply with L3 spills.
  • Rename and dispatch support limited move elimination; per-thread move elimination improves when running two threads, unlike typical SMT behavior.
  • Backend features massive register files and queues, with schedulers similar to Cortex X925; supports up to 606 allocated architectural registers.
  • Load/store: four pipelines (two for stores), 64-bit to 32-bit store forwarding works in halves, but has penalties for other overlaps and strange hiccups at 32B boundaries.
  • Cache hierarchy: 96 KB L1D, 2 MB L2 (10-cycle load-to-use), and 164 MB L3 with over 120 cycles latency; aggressive prefetching sustains ~51 L3 misses in flight.
  • In SPEC CPU2026, Olympus delivers strong single-threaded performance close to desktop cores and far ahead of Neoverse competitors; IPC is often higher than Zen 5.
  • SMT ('spatial multithreading') statically partitions nearly all resources, yielding integer gains on par with Zen 5 but occasional throughput losses in floating-point workloads.
  • Spatial multithreading effectively splits the core into two smaller 5-wide cores; this eases design but may limit dynamic resource sharing, with mixed SMT gains.
  • Olympus beats several server cores in SPEC CPU2017, matching top-end Zen 4 desktop performance, with high SMT gains in branch-heavy workloads.
  • Overall, NVIDIA's Vera/Olympus sets a new bar for server single-threaded performance, leveraging a low-frequency, high-IPC design and strong SMT throughput.