The Lost Atomic Update on Loongson CPU
2 days ago
- An infinite loop in normaliz packaging on LoongArch was traced to a lost update in the CPU's atomic add instruction, a new CPU erratum.
- The bug occurred when threads on different physical cores performed relaxed atomic operations on the same address while one thread interleaved memory reads, especially LASX vectorized reads.
- The first investigation failed to find a minimal reproducer because memcpy's vectorized implementation in glibc was overlooked; AI-assisted analysis identified this in the second round.
- Testing showed atomic add, CAS, max, swap, and similar instructions all lost updates under certain conditions, while versions with data barriers were unaffected.
- AOSC could no longer reproduce the issue because its glibc build had disabled multi-arch support, disabling LASX-accelerated memcpy; Debian still enabled it.
- The erratum can affect Rust's Arc and mpsc reference counting, potentially causing use-after-free or double free, though triggering requires same-process concurrent operations.
- Software workarounds require recompiling with data-barrier atomic instructions, which is costly; the hardware fix is a firmware update setting bit 13 of MCSR24.
- Loongson provided test firmware two weeks after the report, and the fix is expected to be released before October 1, 2026, with negligible performance loss.