Anatomy of a Texture
3 hours ago
- Texture memory layouts are more complex than initially assumed, involving block compression, texel ordering, mips, and tiles for performance reasons.
- Block compression formats like BC7 reduce memory usage and transfer times but complicate debugging due to non-trivial data interpretation.
- Texel ordering or swizzle patterns, such as Morton order, improve cache locality but require re-ordering when converting between platforms.
- Mips are precomputed downsampled versions of textures that improve rendering performance and have platform-dependent memory ordering.
- Textures are divided into tiles (typically 64KiB) with swizzled and compressed content, and smaller mips are packed together into a 'mip tail'.
- Tiles in modern engines may be non-contiguous in memory, requiring address translation from tile index to actual mapped heap address.
- Debugging texture layout involves tricks like writing markers or integer data into blocks to locate memory offsets.
- Converting textures between platforms requires handling all these layout differences, which is a significant challenge in game engine porting.