Recreating Voodoo Graphics and a Late-1990s Gaming PC on an FPGA
7 hours ago
- The author implemented zSST, a SystemVerilog FPGA recreation of the 3dfx Voodoo Graphics (SST-1) chip, combined with a z486 CPU to create a complete DOS gaming PC on a Xilinx KV260 board.
- zSST supports core Voodoo features like triangle rendering, texture filtering, mipmapping, depth/alpha tests, fog, blending, and buffer swaps, with both fixed-point and floating-point setup interfaces.
- The original Voodoo uses two ASICs (FBI and TMU) with dedicated memory paths; zSST recreates this pipeline on FPGA, achieving pixel-per-clock throughput via caching, replay queues, and a reorder buffer to handle DDR latency.
- Performance tests show zSST reaches 78.5 MPix/s for textured triangles and 72.8 MPix/s with depth testing and blending at 100 MHz, though game FPS is CPU-bound (e.g., Tomb Raider runs at ~12 FPS).
- The author highlights memory system challenges, including bandwidth limitations, latency, and the need for efficient caching and access scheduling to keep the pipeline fed.
- The project is open source, with zSST and z486 XL available; credits include SpinalVoodoo, 86Box, and Fabien Sanglard's Voodoo documentation.
- Overall, the work demonstrates how fixed-function 3D graphics can be recreated on FPGA, with future work focused on broader compatibility and later Voodoo generations.