Designing an Ethernet Switch ASIC
16 hours ago
- The author built the world's first open source switch ASIC, expected back from fabrication in mid-November.
- Open source networking ASICs are rare; most open source silicon projects focus on RISC-V SoCs, not networking equipment.
- The switch is a 3-port, full-duplex, 100 Mbps, cut-through, unmanaged Ethernet switch due to constraints on pins, area, and ease of use.
- Design constraints include limited pins (8 I/O, 8 output, 8 bidirectional) and die area, forcing the use of an external PHY chip (Microchip LAN8720A) via RMII interface.
- The switch uses a 4-entry address table with TTL-based aging (300 seconds) and a replacement policy for new MAC learning.
- FPGA emulation revealed that the switch works but 100 Mbps is too slow for large data transfers like SSH with GUI forwarding.
- The switch is part of the 'Coffee Shop' family of open source networking IP, including coffeepot, teapot, and coldbrew ASICs.
- Future plans include scaling to a full chip with 8 ports and implementing a content-addressable memory (CAM) for larger address tables.