Microcode inside the Intel 8087 floating-point chip: register exchange
2 days ago
- The Intel 8087 floating-point chip introduced in 1980 used a co-processor to speed up floating-point operations by up to 100 times, and its floating-point standard is still used today.
- The 8087's microcode, stored in a large ROM, executes low-level micro-instructions that implement complex algorithms for functions like square roots and tangents.
- The FXCH instruction exchanges the top-of-stack register with a specified stack register, requiring 14 micro-instructions due to handling of empty registers and exception conditions.
- The chip uses eight stack registers and two temporary registers (tmpA, tmpB), each with tag bits indicating valid, special, zero, or empty status.
- Microcode for FXCH includes conditional jumps to handle exceptions, such as replacing empty registers with NaN (Not a Number) when an invalid operation is detected.
- The 8087's exception system allows masking interrupts or triggering them, with microcode and hardware collaborating to manage errors like overflow, underflow, or division by zero.
- Reverse-engineering the microcode involved high-resolution imaging of the ROM, using a neural network to classify transistors, and decoding the 16-bit micro-instructions.